1. Field of the Invention
The present invention relates to a VOLTAGE AMPLIFICATION CIRCUIT and more particularly to the voltage amplification circuit constructed by DC (Direct Current) coupling a plurality of inverting amplifiers.
The present application claims priority of Japanese Patent Application No. 2002-314218 filed on Oct. 29, 2002, which is hereby incorporated by reference.
2. Description of the Related Art
In this kind of voltage amplification circuit, in order to increase a voltage amplification factor, it is preferable that multistage amplifiers are DC-coupled to one another. A conventional voltage amplification circuit of this type is described by referring to FIGS. 8 and 9.
The conventional voltage amplification circuit shown in FIG. 8 includes a signal input terminal 1, a clamping capacitor C1, inverting amplifiers 11 and 12 both being DC-coupled to each other and both having the same characteristics, a signal output terminal 2, and a clamping circuit 13. Input signal Vin shows a signal to be input to the signal input terminal 1. The clamping capacitor C1 interrupts a DC component from an external to the conventional voltage amplification circuit, that is, blocks a DC component contained in the input signal Vin and transfers only an AC (Alternating Current) component contained in the input signal Vin to an input node N1. The inverting amplifier 11 amplifies an input voltage V1 at the input node N1 and outputs the amplified voltage to the inverting amplifier 12. The inverting amplifier 12 amplifies an output voltage V2 at an output node N2 of the inverting amplifier 11 and outputs the amplified voltage as an output signal Vout to signal output terminal 2. While a control signal φ CLP fed to a control signal terminal 3 in the clamping circuit 13 is active, a switching transistor M5 in the clamping circuit 13 is turned ON, causing a voltage at a clamping voltage source E1 to be fed to the input node N1 as a clamping voltage Vc for DC biasing. While the control signal φ CLP is inactive, the switching transistor M5 is turned OFF and the input signal Vin is input and an amplifying operation is started. The control signal φ CLP is a control signal which becomes active at specified intervals.
FIG. 9 shows relations among inputs and outputs of the inverting amplifiers 11 and 12. In an upper right quadrant in FIG. 9, input and output characteristics of the inverting amplifier 11 placed in a first stage are shown. In an upper left quadrant in FIG. 9, input and output characteristics of the inverting amplifier 12 placed in a second stage are shown. In the inverting amplifier 11 placed in the first stage, the input voltage V1 obtained by superimposing the AC component contained in the input signal Vin is amplified with the clamping voltage Vc being used as a center voltage level and then the amplified voltage is output as an output voltage V2. The inverting amplifier 12 placed in the second stage receives the input voltage V2, amplifies it and outputs the amplified voltage as an output voltage Vout from the signal output terminal 2.
Here a range where a specified voltage amplification factor to an input voltage is provided and an output voltage is output is called an amplification operating range (shown by “A” in FIG. 9). In the configuration described above, in order for the conventional voltage amplification circuit to provide an excellent characteristic, the clamping voltage Vc serving as an input biasing voltage employed in the first stage is set as a center voltage level in the amplification operating range A of the inverting amplifier 11. This enables the inverting amplifier 11 placed in the first stage to faithfully amplify the input signal Vin and to output voltages each having a same waveform. However, in the inverting amplifier 12 placed in the second stage, since the input signal V2 contains a voltage exceeding a range of an input voltage in the amplification operating range, it is impossible to amplify part of the input signal V2 whose voltage has exceeded the above range, causing the input signal “V2” to have almost a constant output voltage and, therefore, it becomes impossible for the inverting amplifier 12 to faithfully produce an amplified signal so as to have the same waveform as the input signal V2.
To solve this problem, another conventional voltage amplification circuit is disclosed in the Japanese Patent Application Laid-open No. Hei 07-162760 (Japanese Patent No.2586393) in which a clamping voltage fed from a clamping circuit to an input terminal for a second inverting amplifier and obtained by inserting a clamping capacitor between first and second inverting amplifiers is set as a center voltage level in an amplification operating range in the second inverting amplifier. However, this method cannot be applied to a voltage amplification circuit constructed by DC-coupling inverting amplifies.
As described above, the conventional amplifier constructed by DC-coupling inverting amplifiers has a problem in that a inverting amplifier placed in a second stage cannot amplify faithfully an input signal. This problem becomes serious in the case of an amplifier providing a high amplification factor, which makes it difficult to obtain a voltage amplification circuit that can provide a high amplification factor.